Are the hardware design files that describe the qsys system. Hardware abstraction layer hal device drivers with the monitor program. Select the designs sopcinfo file which includes the host nios ii instance. We have a tiny nios ii computer on the de0nanosoc board, now lets put some software on it. In this section you will build a qsys project containing a niosii processor and run a program which will plot the mandelbrot set on the lcd. This document focuses on the nios ii software build tools for eclipse, but most information is also applicable to project development in the command shell. Qsys designer software is the most powerful yet simple advanced dsp software on the market today. This step by step lab shows a user how to build a nios ii qsys based system that includes gpio, uart and onchip memory. Nios ii software development, nios ii software developers.
Introductions to the sopc builder and qsys tools are given in the. Qsys automatically generates interconnect logic to connect intellectual property ip functions and subsystems. A full desciption of the nios ii processor is provided in the nios ii processor reference handbook, which is available in the literature section of the altera web site. Intel quartus prime is programmable logic device design software produced by intel. The qsys system integration tool in quartus prime software saves time and effort in the fpga design process by enabling faster system development and design reuse. Altera is a trademark and service mark of altera corporation in the united states and other countries. The first module to add is some memory, this is used to hold both the instructions and data used by the processor. The appendix b in the lab manual describes how to combine the sw image with the hw. Quartus also generates information that describes the configuration of the system design in qsys, so that the nios ii software development tool can create a software library that matches the hardware system and contains all the correct peripheral drivers. Utilize the associated nios ii processor and qsys hello world lab on the altera max 10 development kit to exercise the concepts discussed in the slides and associated tool demonstrations included in this class. Nios ii custom instruction overview when you design a system that includes an altera nios ii embedded processor, you can accelerate timecritical software algorithms by adding custom instructions to the nios ii processor instruction set. You can perform all software development tasks for your nios ii processor system using the nios ii software build tools sbt for eclipse. Introduction to the altera nios ii soft processor this tutorial presents an introduction to alteras nios r ii processor, which is a soft processor that can be instantiated on an altera fpga device. Control and monitor pld, dpa and cxd amplifiers via usb.
Monitor program tutorial for the nios ii processor. Two bit adder example using qsys tool, the program is written in c which runs on nios ii processor alteras ip. My first nios ii software december 2012 altera corporation tutorial figure 16 shows the nios ii console view at the bottom of the nios ii perspective. The nios ii software build tools for eclipse is the recommended flow. This lab requires the max 10 development kit from altera. June 2011 altera corporation creating multiprocessor nios ii systems tutorial 1. Now that you have created, compiled, and run your first software program, you can. Quartus prime enables analysis and synthesis of hdl designs, which enables the developer to compile their designs, perform timing analysis, examine rtl diagrams, simulate a designs. Nios ii processor manuals ram megafunction user guide quartus web version software this web page is not associated with or sponsored by altera corporation. Nios ii processor core, thats where the software will be executed onchip memory to store and run the software jtag link for communication between the host computer and target hardware typically using a usbblaster cable led peripheral io pio, be used as indicators 1. The input is taken from switch and the ouput is displayed to leds. Through lectures and exercises you will configure the processor component, learn how the software build flow is. The tutorial is a good starting point if you are new to the nios ii. Using the qsys tool to design a nios iibased system integrating the designed nios ii system into a quartus ii project implementing the designed system on the de2115 board running an application program on the nios ii processor 4alteras qsys tool the qsys tool is used in conjuction with the quartus ii cad software.
Start nios ii software build tools, this can be done from the quartus menu tools. The powerlink cn on altera fpga implementation utilizes ipcores available in altera qsys and provided with the openpowerlink stack in the directory hardwareipcore the cn implementation applies the softcore processor altera nios ii to execute the protocol stack. Using the qsys tool to design a nios iibased system integrating the designed nios ii system into a quartus prime project implementing the designed system on the de1soc board running an application program on the nios ii processor 4alteras qsys tool the qsys tool is used in conjunction with the quartus prime cad software. This software enables the user to create designs for the qsys ecosystem. The course teaches the nios ii architecture and its memory, peripherals, how to manage soc system, how to configure system based on nios ii, how to transfer data through the bus system and internal interconnect, how to connect external memories, how to build a system with qsys, how to handle interrupts, how to develop software and ways for. The final system contains the sdram controller, and instantiates a nios ii processor and some embedded peripherals in a hierarchical subsystem. This handbook describes the nios ii software development environment, the nios ii embedded design suite eds tools available to you, and the process for developing software. Introduction to the altera qsys tool cornell university. Nios ii hardware designers use the qsys system integration tool, a component of the quartusii package, to configure and generate a nios system. Access hard processor system hps devices from the fpga. The system design environment was created specifically to be intuitive and easy to use. This course will leverage your knowledge of qsys system design and teach you to embed a nios ii 32bit microprocessor soft core into your fpga design.
It describes the basic architecture of nios ii and its instruction set. Qsys system design tutorial april 2011 altera corporation overview the qsys system you build in this tuto rial tests a synchronous dynamic random access memory sdram. The component must be named sysid to be compatible with. Integrate prebuilt solutions for terasic deseries development kits including analog sensors, ethernet, sdram, and more.
The nios ii sbt for eclipse provides a consistent development platform that works for all nios ii embedded processor systems. From the quartus menu, select tools qsys you will see the initial qsys window with the clock component already added. This qsys setup and program will be modified later in the lab to make use of many instances of the ttc processor introduced in the last lab and in lectures. Watch a free training video of how to develop software for the nios ii processor. Insystem programming for spi flash connected to altera. Qsys tutorial 1 adder using nios ii processor youtube. Designing with nios ii processor using qsys system. In this tutorial you build a nios ii hardware system and create a software program to run on the nios ii system. My first nios ii hardware create a new quartus project.
The nios ii software build tools sbt for eclipse is an integrated development environment for nios ii software development tasks, such as editing, building, and debugging. This course focuses on the hardware aspects of using the processor with handson labs that get you up and running quickly. Simulate and implement sopc design fpga designs with. Use the nios ii flash programmer tool to load the image to the cfi flash. January 2011 altera corporation nios ii custom instruction user guide 1. The configuration graphical user interface gui allows users to choose the niosiis featureset, and to add peripheral and ioblocks timers, memorycontrollers, serial interface, etc. The nios ii software build tools development flow provides an easily controllable development environment for creating, managing, and configuring software applications. The nios ii software build tools include commandline utilities, scripts, and tools for tcl scripting. The host nios ii processor is equipped with a cfi flash which stores the software.
The quartus ii software uses the hdl files to compile the overall fpga design into an sram object file. The video will go through platform designer tool from intel, instantiate. This lab requires the max 10 de10lite development kit from terasic. After successfully building the design open the nios ii flash programmer. It is laid out without clutter or complicated multilevel menus.
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